This is a VHDL 87 book aimed at students. The teaching of VHDL does not start until some thirty pages into the book, after tiny examples in lesser-known languages such as the Genrad Hardware Description Language (GHDL, which is not to be confused with Tristan Gingold's recent VHDL 87 simulator also named GHDL). No mention of Verilog is made at all.
The difference between inertial and transport delays is illustrated by a very clear diagram, whereas elsewhere in the book some other figures are not unclear but are worthless as the words are clear enough. Diagrams are used throughout the book but I, at least, found them to be typically overkill. I do not suggest that they be dropped for a future edition as they do not interfere with reading the chapters if you want to ignore them and people with different backgrounds may rely more heavily on different chapters' illustrations.
Even for people without any prior programming or coding experience, I doubt it is necessary to continue drawing diagrams breaking up code into statements and other syntactic parts as late as the second last chapter; or to follow a very well laid out code snippet of an assignment of all elements of a two dimensional array with a table showing the contents of the array. Some chapters are accompanied by traditional circuit symbols to complement the source code. This is fine for the very small examples novices are shown at first, but fortunately most of the more complicated parts of the book do not have these diagrams. Since the book was published, software 'engineers' have widely adopted drawing aids such as UML tools with relatively poor feasibilities for mapping to runnable executables. I do not expect Zainalabedin Navabi to have commented on this in his 1993 hardware book, but he should have advertised how preferable the flexibility of text-based hardware description languages are to once-popular schematic-based CAD tools.
An important difference in practice between inertial and transport delays is not mentioned even once: i.e. that synthesizers do not allow transport. Transport delays were really only in the book because they are in the language, and are downplayed in favour of inertial delays. Unfortunately, the author encourages many unsynthesizable constructs. Not only are Navabi's behavioral examples unsynthesizable (as is often the case with many people's simulation code), most of his RTL (register transfer level) code is too unsynthesizable and he misleads how low-level parts of VHDL are by claiming "guarded assignments, and resolution functions, which are considered to be among the most important hardware related constructs in the VHDL language".
Guards are used against Ben Cohen's advice. Zainalabedin Navabi extensively uses 'event outside IF and WAIT statements, this synthesis no-no goes as ever without any warning in this book aimed at learning hardware engineers.
Navabi does not give the low-down on how buggy some VHDL analysers can be; how simulators let a design perform feats which would be rejected by a synthesizer; how FPGAs intended for long-life products become ignored when vendors are only interested in supporting newer models; how very complicated it can be to determine from a manufacturer's datasheets how fast a FPGA is etc. A book could not really stay up-to-date with detailed lists of this nature, but a student needs to learn about harsh practicalities at some time. Michael John Sebastian Smith in his "Application-Specific Integrated Circuits" makes a good effort in imparting appreciation of these kinds of issues. Smith's beginners' book has a single VHDL chapter that is 79 pages long. Smith assumes no VHDL knowledge, but it is not really possible to learn VHDL from his book. In contrast, Navabi's VHDL book has a generally good ordering of the presented language features that build upon gradually introduced pre-requisites.
One strength of Smith's book (or many other books) over Navabi's TWO paragraphs on sensitivity lists is that sensitivity lists are not trivialized.
Navabi made a few small typos, some of which occur in the source code. I don't think that any of the earliest pieces of code had any lexical mistakes. One of the first array assignments has an identifier misspelt but by this stage in the book a novice would be able to spot and rectify the error. VHDL's expressive advantage of array indexing with enumeration types is clearly explained and quickly covered. Navabi chose to illustrate this with a two dimensional array whose elements are also of the same type as the index types. This is not as contrived as it might seem, because the array is a logic table for a gate applicable to multi-valued logic. However, it may have helped a newcomer to see this preceded by a plainer example with unrelated types for the indices and elements.
Earlier in the book the concept of ideal bits is matured slightly into ternary and quaternary value logic more for the purpose of teaching about enumeration types than imparting an appreciation for the uncertainties or irrelevance of certain parts of hardware etc. It is a VHDL-87 book so it is fair enough that the Std_Logic_1164 package is not mentioned. Signals are discussed a lot, leaving a novice with little to ask. A full explanation of when := is legal for a signal should have been in the book and I would have liked an example of a signal resolution function which does not simply loop through all the drivers.
More coverage of user-defined attributes would have been nice but more importantly Navabi gave no warning that even many predefined attributes are not supported by synthesis tools. I could try to complain about more such as a mistake in the BNF appendix I found by accident, but really as an introduction to the syntax of VHDL this is a nice book. Practical implementations of subsets of VHDL may be disappointing so the book should not have only warned that the most abstract architectures will not be synthesizable. A beginner to programming may be frustrated when confronted with a compiler error message, but if he or she scrutinizes the rejected attempt at C++ or Java code would agree that it is illegal. Unless armed with something similar to the table of supported and unsupported synthesis constructs in "VHDL Answers to Frequently Asked Questions" by Ben Cohen, a beginner to describing hardware may be even more unhappy with an analyzer which rejects textbook code which is legal VHDL